I may or may not know what I'm doing.
2022-12-22
Note: Course experiences
This is part of a 5-part series on the upper year experience at the University of Waterloo.
Today’s topic will be on 3B. I will talk about each individual 3B course experience.
There are even more choices this term, as we have to choose 3B TEs. Additionally, 3A and 3B are back-to-back for stream 4, so the streams meet back up.
Courses:
Difficulty: (Hard) ECE 307 > ECE 320 > ECE 351 > ECE 358 (Easy)
Interest: (Cool) ECE 320 > ECE 351 > ECE 358 > ECE 307 (Tedious)
Disclaimer: The above two scales are relative, not absolute.
Also, starting with the class of 2023, the old ECE 331 has been turned into ECE 231, and a new ECE 331 Electronic Devices has been created.
The ECE Society’s YouTube channel has a couple of videos on ECE 3B courses.
Chance 2.
This is THE course of the term. I did not understand the content. I still do not understand the content. I thought this would be my lowest grade in my undergraduate career but the class got curved hard.
ECE 222 2 (the sequel).
This course used to have ECE 429 as the course code.
If you are interested in the inner workings of computer processors, this is the course to take. If you are not interested in digital hardware, ECE 320 will destroy you.
The first third of the course is review of the RISC-V processor, followed by a more in-depth view of caching and paging (including associativity and cache coherency with both private and shared caches), and then superscalar (multiple instructions in each stage at once), dynamic scheduling (out-of-order execution when each execute unit takes a different amount of clock cycles to complete), and multiprocessor systems.
The ECE 320 labs lead up to simulating an entire pipelined RISC-V processor in Verilog. That includes the forwarding and hazard avoidance and combinational control logic that was glossed over in ECE 222. Personally, I spent a lot of time drawing the circuit diagrams by hand before writing any code.
Ignore the tutorial 6 parts, I just used the whitespace underneath for the diagram.
Trees and graphs.
The course is heavily entwined with the lab content, which is pretty good since the lab is a direct application of the theory learned. There is a lot of language analysis such as tokenization, manipulating the abstract syntax tree (AST), grammars from ECE 208, and look-ahead (e.g. LL(1)). As well, there is dataflow analysis and colouring for register allocation.
Unfortunately, ECE 351 labs are in Java (which does make sense as the AST nodes are being manipulated). Also, if you do the bonus lab, the x86_64 instructions are from left to right (e.g. add %rbx %rax
adds rbx and rax together, placing the result in rax), which is AT&T style. This took a frustratingly long time to debug.
I did not take this course, but it is an honourable mention as I know many who took it.
The professor was very disorganized and labs ended up being released late. Even worse was that the databases for the lab were hosted on ECE servers, so they became congested near the lab deadline.
Other offerings of the course with different professors are apparently much better.
Interwebz.
This course is exactly as written on the tin. Goes through all layers of the OSI model, starting from the link layer (MAC addresses). A bit memorization-heavy since it’s just going through all the protocols.
The first two ECE 358 labs are creating event-driven network simulations, with the last lab basically just rewording the Unix command descriptions. They were pretty easy but very tedious, since a report had to be written for each one.
Also, some students created extremely inefficient simulators by simulating every time point (e.g. t=1, t=2, etc.), instead of simulating by event (e.g. packet 1 arrives at t=3, packet 1 is processed at t=6, packet 2 arrives at t=4, etc.). The paradigm shift is that there isn’t really a known state of the system at any arbitrary time, just totals and averages at the end (e.g. dropped packets, time spent in queue).
The important information to take away is 3B courses.
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